The CT6910 chip supports floating-point operations and DSP instructions, featuring up to 1MB of on-chip Flash, 512KB of SRAM, and integrates up to 8 high-performance analog devices. It includes 21 digital communication interfaces and over 10 built-in cryptographic algorithm hardware acceleration engines, supporting various security features such as secure storage, user partition protection, and secure boot.
The CT6912E chip supports floating-point operations and DSP instructions, with up to 1MB of on-chip Flash and 512KB of SRAM. It integrates up to 8 high-performance analog devices, 21 digital communication interfaces, and more than 10 hardware acceleration engines for password algorithms. It supports multiple security features such as storage encryption, user partition protection, and secure boot.
The CT-2001A chip adopts a superscalar ASIC architecture, achieving multithreaded concurrency with latency below 20 nanoseconds. It features an integrated FOC analog computing unit, programmable digital filtering, neural network adaptive control, and an analog IDPU (Integral-Differential Processing Unit). With hardware acceleration, latency is as low as 0.2 nanoseconds (compared to 2.8 nanoseconds in traditional solutions). The chip includes 1MB on-chip Flash, 512KB SRAM, 21 digital communication interfaces, and built-in hardware acceleration engines for over 10 cryptographic algorithms, supporting secure features such as storage encryption, user partition protection, and secure boot.