CT6910



Robot Joint Control Chip

CT6910

 

Product Introduction

The CT6910 chip supports floating-point operations and DSP instructions, with up to 1MB of on-chip Flash and 512KB of SRAM. It integrates up to 8 high-performance analog devices, 21 digital communication interfaces, and more than 10 hardware acceleration engines for password algorithms. It supports multiple security features such as storage encryption, user partition protection, and secure boot.

Product Features

1. Up to 1MB Flash, supports encrypted storage, partition management, and data protection, supports ECC verification, 100000 erasures, and 10-year data retention;

2. Up to 512KBytes SRAM, supporting hardware parity check;

3. Support automatic acquisition of built-in ADC data and external SDFM data, support hardware acceleration of CLARKE/PARK/PID/IPARK/SVPWM algorithms, support automatic update of EPWM output duty cycle, and support up to Q24 fixed-point output accuracy.


Technical configuration and performance

Product Name

Robot control chip

Model

CT6910

Package size

12mm×12mm×1.60mm

pin

64

CPU

RISC-V 32-bit single core, with a main frequency of 520 MHz

RV32IMAFDCP instruction architecture

L1 I/D-Cache 16KB/16KB

Supports single cycle tightly coupled storage (TCM), with a maximum configurable size of 128 KB+128 KB for I/D-TCM

Single/Double Precision Floating Point Unit, Integrated DSP Instruction Set

PMP Security Protection

Internal Interrupt CLINT and Interrupt Controller CLIC

Support Mailbox communication between cores

On chip storage

SRAM 512 KB, Among them, 128 KB+128 KB can be configured for TCM use

Flash capacity of 1 MB

System startup

The startup sequence can be changed by burning EFUSE

Supports USB/UART burning

SiP SPI NOR supports external direct mode for burning

system security

• Support digital signature secure boot mode

CE implements encryption and decryption algorithms such as AES/TDES, as well as SHA/HMAC calibration algorithms

Implement SPI NOR online decryption using SPI-INC

SID built-in fuse 512 bit, of which 64 bit is for custom use

Built in 256 bit TRNG generator

Supports JTAG with unlock

System Control

Built in THS temperature sensor, supporting high and low temperature alarm and over temperature reset

WDOG watchdog

Supports interrupts and resets, with configurable timeout periods ranging from 1ms to 37 hours

• Can be configured to pause or resume timing in debugging mode

• Hardware

Clock and power management

Built in two PLLs

PLL_INT0 is used for CPU standalone use

• PLL_FRA0 is used for peripheral interfaces and supports frequency spreading

Built in LDO

GPT Universal Timer

Supports four GPTs and 32-bit counters

• Supports output comparison signals, which can be used to generate interrupts and pin outputs

Universal Interface

Supports a USB FS Device

Supports up to 4 SPIs, including standard SPI and QSPI, and can be configured as Master or Slave

Supports up to 9 UART, compatible with industry standard 16550, baud rate accuracy<2%

Supports up to 4 I2C, 7-bit and 10 bit addressing, with a maximum speed of 400 Kb/s

Supports one CAN, CAN2.0A and CAN2.0B, with a maximum speed of 1 Mbps

Supports up to two CAN-FDs with a maximum speed of 10 Mbps

working environment

1.8~3.6V/-40~105℃±4kV ESDHBM

FOC built-in hardware algorithm

Support automatic acquisition of built-in ADC data and external SDFM data

Support hardware acceleration for CLARKE/PARK/PID/IPARK/SVPWM algorithms

Support automatic update of EPWM output duty cycle

Supports up to Q24 fixed-point output accuracy

EPWM (Enhanced PWM)

Supports 9 EPWM channels and breakpoint mode

Supports 9 HRPWM channels with a resolution of up to 120p

Built in 16 bit counter

Supports increasing, decreasing, or increasing first and then decreasing counts

PWM supports internal phase synchronization

Support dead time control

Supports six fault input controls

Support pulse group output function

SDFM (Sigma-Delta Interface)

Supports four SDFM

Supports serial input decoding

Supports SINC 1/2/3 filters

Supports OSR configurable

ADC

Built in two 14 bit ADCs

The highest sampling rate is 2MSPS

Two ADCs multiplex 13 sampling channels

Supports hardware 1/2/4/8/16/32 oversampling modes

Support external input reference voltage

CPM (Comparator Module)

Support external input reference voltage

Supports up to two CPMs

Comparison of windows with built-in 12 bit DAC reference

OPA

Supports up to four OPAs, with programmable gain

Supports source following mode, gain amplification mode, and differential amplification mode

Typical Applications

Servo motor driver

BLDC motor driver


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